Metal oxide semiconductor (MOS) technology is used to form a number of different types of devices which include semiconductor memory devices dependent on hot electron programming. When programming one type of these devices, hot electrons are injected from the drain through the tunnel dielectric and into the floating gate. As such, hot electrons are present during programming and do not give rise to any adverse effects. On the other hand, when a high hot electron concentration occurs in a MOS transistor, several problems can arise including hot electron induced device degradation. Hot electrons may have sufficient energy to damage the substrate-gate dielectric interface near the drain edge that may cause to adverse changes in the transistor characteristics.
Certain types of intermetal dielectrics have been found to cause problems with hot electrons at the substrate-gate dielectric interface near the drain. An intermetal dielectric (IMD) film typically absorbs ambient moisture and when the device is passivated, the moisture is trapped. Subsequent heat cycles may drive the moisture into the gate oxide region. In the prior art, the hot-electron susceptibility of transistors using wet gate oxides is known to be inferior to those of transistors using dry chlorinated gate oxides. Therefore, water absorbed into the IMD film could migrate to the gate dielectric thereby making a device more susceptible to hot electron induced device degradation.
A number of prior an attempts have not yielded adequate results, one of which includes placing a moisture barrier in the form of gate sidewall spacers comprised of a material such as silicon nitride near the gate of the device. Silicon nitride causes device instability because hot electrons are trapped in the silicon nitride and near the gate.
Another prior an attempt minimizes the exposure of the IMD film to air between the steps of IMD film deposition and passivation deposition. This processing sequence has serious drawbacks in a manufacturing environment because it is typically difficult to guarantee that the equipment used for subsequent steps would be available immediately following the IMD deposition. As such, a sufficiently short queue time between IMD deposition and passivation deposition which is typically a few processing steps later in the process flow has proven to be impractical.
A higher density IMD film is desired so that the moisture absorption rate of the film is reduced (compared to a lower density IMD film). A few prior art attempts at making such a film have proven to be inadequate in one or more ways. An undoped, silane-based film is highly nonconformal and causes step coverage problems particularly with state-of-the-art devices having step heights greater than one micron (.mu.m). Some problems with nonconformal IMD films are addressed in an article entitled "A Single Pass, In-Situ Polarization Process Utilizing TEOS for Double-Poly, Double-Metal, CMOS Technologies" by Mehta, et al. from the IEEE Sixth International VLSI Multilevel Interconnection Conference in June 1989.
The concepts of conformal and nonconformal films as well as problems with the latter are illustrated in FIGS. 1-6. FIG. 1 is an illustration of a film that is conformal. The substrate 101 has a planar surface with metal lines 102 which are about 1 .mu.m wide and 1 .mu.m high and are spaced about 1.1 .mu.m apart. The conformal film 103 follows the exposed topography of the combination of substrate 101 and metal lines 102 very well. FIG. 2 illustrates a nonconformal film deposited over a substrate-metal topography similar to FIG. 1. The nonconformal film 203 produces a film with a reentrant angle .beta. as illustrated in FIG. 2. A nonconformal film has localized areas where the etch rate of the film is higher at the corners due to higher film stress at the comers of the film. Because of the reentrant angle, chemicals could remain within the grooves 204 that are near the intersection of the substrate 101 and metal lines 102. Further deposition of the nonconformal film 303 could create a "void" 304 between the metal lines 102 as shown in FIG. 3.
FIG. 4 shows a material 404 such as metal sputtered over the nonconformal film 203 yielding localized areas of discontinuity 405 thereby causing open circuits. FIG. 5 illustrates a conformal film 504 deposited over the nonconformal layer 203. A subsequent anisotropic plasma etch of the conformal film 504 results in residual sections which are not etched due to the directional nature of the anisotropic plasma etch. The residual sections are referred to as "stringers" 604 which are shown in FIG. 6. Stringers are not desired since they can cause circuits within the device to become shorted to one another or react with other layers within the device. Nonconformal films are not desired because they may create a device that is not functional or less reliable.
A prior art attempt to form a more conformal IMD film includes using very heavily doped silicon dioxide films, such as boron oxide as described in an article entitled "In Situ Planarization of Dielectric Surfaces Using Boron Oxide" by Marks, et al. from the IEEE Sixth International VLSI Multilevel Interconnection Conference in June 1989. The heavy doping from these films is not desired as these dopants could migrate from the IMD film to the underlying devices. In addition, the dopant could spew from the walls of a subsequently formed opening in the IMD film and react with material that fills the opening or with other layers that are in contact with the opening.
Unlike undoped, silane-based dielectric layers, a TEOS-based (TEOS is tetraethyl orthosilicate) dielectric film is significantly more conformal. In the absence of a plasma, TEOS deposition by thermal decomposition is typically done at temperatures between 700.degree. C. and 900.degree. C. These high temperatures could melt many metals used in semiconductor devices such as aluminum, and therefore, a plasmaless TEOS-based dielectric cannot typically be used as an IMD film.
Another prior art attempt uses a standard plasma-enhanced TEOS-based IMD film (standard IMD film) that produces a low density film. By low density, it is meant that the HF etch rate of standard IMD film is approximately 1.9 to 2.8 times higher than the HF etch rate of silicon dioxide thermally grown from monocrystalline silicon (hereinafter referred to as thermally grown oxide). A standard plasma-enhanced TEOS process forms a low density IMD film which absorbs water at a fast rate. A lower density IMD film is more susceptible to hot electron induced device degradation than a higher density IMD film.
Throughout this application, comparisons of the IMD film densities are given as a relative HF etch rate (hereinafter referred to as relative HF etch rate) which is the HF etch rate of an IMD film divided by the HF etch rate of thermally grown oxide when a similar HF etching solution is used to etch both the IMD film and the thermally grown oxide. Relative HF etch rates provide a better comparison of the density rather than an absolute HF etch rate since the possible mixtures of HF etching solutions are unlimited.